CCD Clock Board Modifications
The TEK/SITe controllers have extra load capacitors to slow down the clock edges.
Document showing details of the load capacitors on TEK/SITe controllers
Photo of EEV/MIT Clock Board (for single and dual cameras)
In addition some boards received from SDSU have had R70 set to 10K. This resistor sets the maximum possible amplitude of the clock voltages. In the case of the CCD boards, R70 should = 5K. Some boards have also been received without D1 and D2 , which are 5.6V zener diodes. All these components should be checked.
The IR clock boards used in INGRID use slower electronics and cannot be exchanged for CCD clock boards.
L3 Controllers have shaping capacitors
on the clock board to give 200ns edges.
