There are a series of 14 way DIL sockets near the 37 Way D connector. A 10nF load will produce a 1 microsecond rise/fall time on the corresponding clock.

Serials+SW+PhiReset need 200ns edges = 2.2nF load

Parallels+TG need 5microsecond edges = 47nF load

Therefore, five 2.2nF capacitors are added in the indicated positions on sockets D3,4

And four 47nF capacitors are added in the indicated positions on sockets D5,D6