Phase 3 of the imaging clocks is connected to the output stage - to reset the output on every line. Without taking special care, this will reset the output if you are integrating under it when the register scan occurs..BEWARE, we use either phase 1 or 2....
Same Image expanded in time
Chip 0 Configuration.
Virtual head number 1 Serial number is :- EEV CCD42-80, 4k 5383-17-7
0 0.00 Volts Channel 0 1 0.00 Volts Channel 0
2 0.00 Volts Channel 0 3 0.00 Volts Channel 0
4 0.00 Volts Channel 0 5 0.00 Volts Channel 0
6 0.00 Volts Channel 0 7 0.00 Volts Channel 0
V+SL -17.70 Volts Channel 8 V- -16.00 Volts Channel 9
V+ -6.00 Volts Channel 10 V-SL 2.40 Volts Channel 11
RD 2.00 Volts Channel 12 VSS -9.00 Volts Channel 13
OG1 -13.00 Volts Channel 14 V++ -5.00 Volts Channel 15
R-SL 2.00 Volts Channel 16 R- -15.00 Volts Channel 17
R+ -5.00 Volts Channel 18 R+SL -18.00 Volts Channel 19
ODL 7.00 Volts Channel 20 ODH 17.50 Volts Channel 21
OG2H -12.00 Volts Channel 22 OG2L 3.00 Volts Channel 23
24 0.00 Volts Channel 0 BG 7.00 Volts Channel 25
DMP 5.00 Volts Channel 26 H++ -2.00 Volts Channel 27
H+ -5.00 Volts Channel 28 H- -14.00 Volts Channel 29
H-SL 2.00 Volts Channel 30 H+SL -18.00 Volts Channel 31
Virtual Head 1 configuration. Physical head :- 1
Full readout mode. Chip Output Gain : High
There is 1 EEV48 ccd present numbered 0
Frame size is 2148 by 4200 pixels. Binning factor is 1 by 1
TURBO readout speed. FLASH clear speed.
Window 0 :- Origin x = 0, y = 0. Size 400 by 600 pixels.
Window 1 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 2 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 3 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 4 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 5 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 6 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 7 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 8 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 9 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 10 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 11 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 12 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 13 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 14 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Window 15 :- Origin x = 0, y = 0. Size 0 by 0 pixels.
Physical Head 1 configuration.
Camera type = Cryogenic Temperature set to -120 degrees
C.
Preflash time = 0 units Exposure time = 0 ms
--------------------------------------------------------------------------------
Virtual Head 1 configuration.
Full readout mode. Chip Output Gain : High
There is 1 EEV48 ccd present numbered 0
Frame size is 2148 by 4200 pixels. Binning factor is 1 by 1
TURBO readout speed. FLASH clear speed.
There are 1 windows set up
1 RAM-DISK 0
0 ( DEFINE CLOCKS ) SEQUENCER DEFINITIONS ( apo 28 May 97)
1 \ For EEV CCD42-80 op(L)
2 00 0 CLOCK TRACK ( TS0 ) 01 1 CLOCK TRIG ( AC0 )
3 02 0 CLOCK SIG-SAMP ( CS0 ) 03 0 CLOCK REF-SAMP ( CR0 )
4 04 1 CLOCK SIG-RST ( RS0 ) 11 1 CLOCK REF-RST ( RR0 )
5 17 1 CLOCK CLAMP ( CL0 ) 25 0 CLOCK RSCK ( RSA )
6 ( HA1) 23 1 CLOCK 1HCK \ 23 op(L) 30 op(R)
7 ( HA2) 30 0 CLOCK 2HCK \ 30 23
8 ( HA3) 34 0 CLOCK 3HCK
9 ( HA4) 28 0 CLOCK SWCK
10 ( VA1) 24 0 CLOCK 1VCK \ lower reg. only for 42 series
11 ( VA2) 26 1 CLOCK 2VCK
12 ( VA3) 19 0 CLOCK 3VCK
13 ( VA4) 31 0 CLOCK 4VCK \ used for DG
14 ( VLA) 35 0 CLOCK RD/I
15 -->
2 RAM-DISK 0
0 ( Vertical clock ) SEQUENCER DEFINITIONS ( apo 28 May 97)
1
2 0 SOR VCLOCK
3
4 1VCK 150 DF 150 ND \ 1VCK 150+150
5 2VCK 100 DF 150 ND \ 100+150
6 3VCK 50 DF 150 ND \ 3VCK 50+150
7 2HCK 320 ND \ 650 2clks hi during v->h
8 350 EOR \ 700
9 \ For EEV CCD42-80 with 1uS R&F times (to 1/e)
10
11 VCLOCK >RAM
12 -->
13
14
15
3 RAM-DISK 0
0 ( Horizontal clock ) SEQUENCER ( APO 21 Nov 96)
1 1 SOR HCLOCK
2 RSCK 10 DF 20 ND
3 1HCK 5 DF 15 ND
4 2HCK 15 ND
5 3HCK 10 DF 15 ND
6 SWCK 10 DF 15 ND
7 35 EOR HCLOCK >RAM
8
9 15 SOR HRINT
10 RSCK 25 ND
11 1HCK 1000 ND
12 2HCK 1000 ND
13 3HCK 50 ND
14 4VCK 1000 ND
15 1010 EOR HRINT >RAM -->
ImageForth/68 V4.2.3a CTRONIX/68008 09 Jun 97
4 RAM-DISK 0
0 ( Table for use Variable Speed pixel used APO 27 May 97)
1
2 VARIABLE PIXSPD 15 PIXSPD ! \ pixel routine speed param.
3 \ This single routine now used for S,Q,t & N Speed
4 \ The numbers below are sample times - an offset of 5 x 10
5
6
7 95 PIXSPD ! 2 SOR SP0 5 LOAD SP0 >RAM
8 45 PIXSPD ! 4 SOR SP1 5 LOAD SP1 >RAM
9 15 PIXSPD ! 5 SOR SP2 5 LOAD SP2 >RAM
10 5 PIXSPD ! 13 SOR SP3 5 LOAD SP3 >RAM
11
12
13
14 2 FH LOAD
15
5 RAM-DISK 0
0 ( NEW SINGLE PIXEL RTN ) SEQUENCER ( APO 27 May 97)
1 ( ***** VBL SPEED ROUTINE .5+%+.5+%us CDS )
2 RSCK 20 ND
3 1HCK 5 DF 15 ND
4 2HCK 15 ND
5 3HCK 10 DF 15 ND
6 REF-SAMP 50 DF 5 ND 1 %
7 SWCK 10 DF 45 ND 20 DF 20 ND
8 SIG-SAMP 85 DF 5 ND 2 %
9 TRACK 85 DF 10 ND
10 TRIG 100 DF 5 ND
11 CLAMP 25 DF 85 ND
12 SIG-RST 35 DF 75 ND
13 REF-RST 35 DF 75 ND
14 PIXSPD @ DUP 1 >% 2 >%
15 110 EOR
6 RAM-DISK 0
0 ( Loading binned pixels APO 27 May 97)
1 ( The next 1 block hold the waveform changes for binned pixels
2 They require the x binning factor on the stack when loaded.
3 This block holds parameters used to locate the required block. )
4
5
6 VARIABLE CDST 35 CDST ! \ Used for variable speed binning
7 \ Default is 5+35 = 4us
8 BLK @ 1+ VHT BIN-BLOCK !
9 6 SOR BIN
10 7 FH LOAD
11
12
13 \ Dont load all the blocks for each speed anymore use Vble
14 \ Speed in previous block...
15
ImageForth/68 V4.2.3a CTRONIX/68008 09 Jun 97
7 RAM-DISK 0
0 ( Binned Block - 1 ) DECIMAL ( apo 09 Jun 96)
1 SEQUENCER VIA SEQUENCER FORTH ENDVIA DEFINITIONS
2
3 : COMPILE-BIN-PIX ( xbin-factor -- ) >R BIN SOR
4 RSCK 15 ND
5
6 1HCK 10 DF I 0 DO 5 DF 15 ND 5 DF LOOP
7 2HCK 10 ND I 0 DO 15 ND 10 DF LOOP
8 3HCK 10 DF I 0 DO 10 DF 15 ND LOOP
9
10
11 [
12
13 -->
14
15
8 RAM-DISK 0
0 ( Binning Block - 2 ) DECIMAL ( apo 27 May 97)
1 ]
2 REF-SAMP 10 DF I 25 * DF 20 DF 5 ND 1 %
3 SWCK 10 DF I 25 * ND 35 ND 20 DF 25 ND
4 SIG-SAMP 10 DF I 25 * DF 65 DF 5 ND 2 %
5 CLAMP 10 DF I 25 * DF 120 ND
6 SIG-RST 10 DF I 25 * DF 120 ND
7 REF-RST 10 DF I 25 * DF 120 ND
8 TRACK 10 DF I 25 * DF 65 DF 15 ND
9 TRIG 10 DF I 25 * DF 90 DF 10 ND
10 CDST @ DUP 1 >% 2 >%
11 R> 25 * 120 + EOR BIN >RAM ;
12 COMPILE-BIN-PIX BIN-TEMP FORGET COMPILE-BIN-PIX
13
14
15
9 RAM-DISK 0
0 ( Standard readout speed ) SEQUENCER ( apo 27 May 97)
1 2 SOR SP0 ( ***** STANDARD .5+%+.5+%us CDS )
2 RSCK 20 ND \ 10+10 us
3 1HCK 5 DF 15 ND
4 2HCK 15 ND
5 3HCK 10 DF 15 ND
6 REF-SAMP 50 DF 5 ND 1 %
7 SWCK 10 DF 45 ND 20 DF 50 ND
8 SIG-SAMP 85 DF 5 ND 2 %
9 TRACK 85 DF 10 ND
10 TRIG 100 DF 5 ND
11 CLAMP 25 DF 85 ND
12 SIG-RST 35 DF 75 ND
13 REF-RST 35 DF 75 ND
14 95 DUP 1 >% 2 >%
15 110 EOR SP0 >RAM -->
ImageForth/68 V4.2.3a CTRONIX/68008 09 Jun 97
10 RAM-DISK 0
0 ( QUICK readout speed ) SEQUENCER ( apo 27 May 97)
1 4 SOR SP1 ( ***** QUICK .5+%+.5+%us CDS )
2 RSCK 20 ND \ 5+5 us
3 1HCK 5 DF 15 ND
4 2HCK 15 ND
5 3HCK 10 DF 15 ND
6 REF-SAMP 50 DF 5 ND 1 %
7 SWCK 10 DF 45 ND 20 DF 50 ND
8 SIG-SAMP 85 DF 5 ND 2 %
9 TRACK 85 DF 10 ND
10 TRIG 100 DF 5 ND
11 CLAMP 25 DF 85 ND
12 SIG-RST 35 DF 75 ND
13 REF-RST 35 DF 75 ND
14 45 DUP 1 >% 2 >%
15 110 EOR SP1 >RAM -->
11 RAM-DISK 0
0 ( TURBO readout speed ) SEQUENCER ( apo 27 May 97)
1 5 SOR SP2 ( ***** TURBO .5+%+.5+%us CDS )
2 RSCK 20 ND \ 2+2 us
3 1HCK 5 DF 15 ND
4 2HCK 15 ND
5 3HCK 10 DF 15 ND
6 REF-SAMP 50 DF 5 ND 1 %
7 SWCK 10 DF 45 ND 20 DF 50 ND
8 SIG-SAMP 85 DF 5 ND 2 %
9 TRACK 85 DF 10 ND
10 TRIG 100 DF 5 ND
11 CLAMP 25 DF 85 ND
12 SIG-RST 35 DF 75 ND
13 REF-RST 35 DF 75 ND
14 15 DUP 1 >% 2 >%
15 110 EOR SP2 >RAM -->
12 RAM-DISK 0
0 ( Nonastro readout speed ) SEQUENCER ( apo 27 May 97)
1 13 SOR SP3 ( ***** NONASTRO .5+%+.5+%us CDS )
2 RSCK 20 ND \ 1+1 us
3 1HCK 5 DF 15 ND
4 2HCK 15 ND
5 3HCK 10 DF 15 ND
6 REF-SAMP 50 DF 5 ND 1 %
7 SWCK 10 DF 45 ND 20 DF 50 ND
8 SIG-SAMP 85 DF 5 ND 2 %
9 TRACK 85 DF 10 ND
10 TRIG 100 DF 5 ND
11 CLAMP 25 DF 85 ND
12 SIG-RST 35 DF 75 ND
13 REF-RST 35 DF 75 ND
14 5 DUP 1 >% 2 >%
15 110 EOR SP3 >RAM -->
ImageForth/68 V4.2.3a CTRONIX/68008 09 Jun 97
13 RAM-DISK 0
0 ( Dummy pixel routine ) SEQUENCER ( apo 29 Aug 96)
1 14 SOR DPIX ( ***** DUMMY PIXEL 1+1us CDS )
2 RSCK 20 ND
3 1HCK 5 DF 15 ND
4 2HCK 15 ND
5 3HCK 10 DF 15 ND
6 REF-SAMP 50 DF 5 ND 1 %
7 SWCK 10 DF 55 ND 10 DF 50 ND
8 SIG-SAMP 85 DF 5 ND 2 %
9 \ TRACK 85 DF 10 ND \ NO A/D or S/H trig for dummy
10 \ TRIG 100 DF 5 ND
11 CLAMP 25 DF 85 ND
12 SIG-RST 35 DF 75 ND
13 REF-RST 35 DF 75 ND
14 5 DUP 1 >% 2 >% \ gives 1+1 us
15 110 EOR DPIX >RAM -->
14 RAM-DISK 0
0 ( Vmov w/o SR scan ) SEQUENCER ( apo 17 Jan 97)
1 3 SOR QUICK-CLR
2
3 1VCK 150 DF 150 ND
4 2VCK 100 DF 150 ND
5 3VCK 50 DF 150 ND
6
7
8 1HCK 400 ND
9 2HCK 400 DF
10 3HCK 400 DF
11 400 EOR
12 QUICK-CLR >RAM
13 \ V-clock charge into last row(s) to overcome low CTE...
14 -->
15
15 RAM-DISK 0
0 ( Flash fast clear of CCD ) SEQUENCER ( apo 20 Jan 97)
1 7 SOR FLASH-CLR
2 RD/I 350 ND
3 1VCK 150 DF 150 ND
4 2VCK 100 DF 150 ND
5 3VCK 50 DF 150 ND
6 4VCK 400 ND \ This manipulates DD on the EEV
7 \ RSCK 400 ND
8 1HCK 400 DF
9 2HCK 400 ND
10 3HCK 400 ND
11 410 EOR
12 FLASH-CLR >RAM
13 \ 1 V-clock triplet then dump into register drain x n for EEV4x
14 -->
15
ImageForth/68 V4.2.3a CTRONIX/68008 09 Jun 97
16 RAM-DISK 0
0 ( SETUP FUNCTIONS. apo 02 Oct 96)
1 SP0 SET-SPEED0
2 SP1 SET-SPEED1
3 SP2 SET-SPEED2
4 SP3 SET-SPEED3
5 SP0 SET-SPEED4
6 BIN SET-BIN
7 HCLOCK SET-DPIX
8 HCLOCK SET-HCLK
9 VCLOCK SET-VCLK
10 HRINT SET-HIDLE
11 QUICK-CLR SET-QCLR
12 \ SET-FCLK
13 \ SET-CLKS
14 \ SET-CLKT
15 FLASH-CLR SET-FCLR -->
17 RAM-DISK 0
0 ( Customisations for EEV CCD42) FORTH DEFINITIONS ( apo 28 May 97)
1 : PFS PREFLASH-SCALER ; 40 PFS ! \ 1 unit = 1.25us
2 : ENBT 0 'SILENT C! VT100 RAM-DISK ( 11 LIST )
3 [ CCDS ] CONFIG ;
4 : S-CLR [ VHT ] STANDARD CLEAR-SPEED ;
5 : Q-CLR [ VHT ] QUICK CLEAR-SPEED ;
6 : F-CLR [ VHT ] FLASH-CLR CLEAR-SPEED ;
7 : IOS 1 ?IS ; : SETI -1 TIMES IOS ;
8 : SETCDS [ SEQUENCER ] CDST ! ;
9 : OPGH 2 OPG ; : OPGL 1 OPG ;
10 : VMOV [ SEQUENCER ] HERE 4096 3 FC HERE >FIFO ;
11 1V 2148 4200 13 NEW-TYPE EEV48 EEV48
12 \ 2V 2148 4200 13 NEW-TYPE EEV48 EEV48
13 \ Attributes are 3 2 1 0
14 \ dump- opg- no- od-sw
15 --> \ drain sw idle
18 RAM-DISK 0
0 ( Customisations - general) SEQUENCER ( apo 22 May 97)
1 5 [ ' ] PA-RES ! \ P/A res = 470ohms
2 -1 1 I-OFFSET ! 7 2 I-OFFSET ! \ Set ?IS offset, for 2 heads
3 38 1 OD-ZERO ! 40 2 OD-ZERO ! \ OD Offset. For 2 heads
4 1 PHYSICAL 2065 'ZERO-AD ! 0 'SERVO-ZERO !
5 2 PHYSICAL 2065 'ZERO-AD ! 0 'SERVO-ZERO !
6 FORTH DEFINITIONS
7
8 1P -15 'SERVO-ZERO ! T-ON \ 1 unit = -0.16 degC
9 97 YEAR W!
10
11 : WHO? PAGE BELL CR 20 SPACES ." SUPER CCDC!! " CR ;
12
13
14 WHO? -->
15
ImageForth/68 V4.2.3a CTRONIX/68008 09 Jun 97
ok
Somewhere to go for a vacation...
I am... apo
