The readout noise was characterised for all outputs in both hi-gain and lo-gain mode. These modes were selected by switching the voltage on OG2 so as to vary the output node capacitance.
The output sensitivities of the CCDs are shown below in mV/electron.
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Left Output
Hi-gain Sensitivity |
Right Output
Hi-gain Sensitivity |
Left Output
Lo-gain Sensitivity |
Right Output
Lo-gain Sensitivity |
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The RMS noise is tabulated below for a variety of CDS integration times.
In all cases the CDS RC constant was 4.3ms.
Both CCDs gave significantly higher gain and lower noise with their right
hand outputs.
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Noise and gain are critically dependent on the operational voltages. In particular the output FET drain and image area clock- low should be set to within 100mV of the voltages recommended in Appendix A.